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Peripherals 30 Navigator 32 Enhanced Direct Memory Access (EDMA) Controller 32 Universal Asynchronous Receiver/Transmitter (UART) 32 General purpose input–output (GPIO) 32 Internal timers 32 Conclusion 33 References 33 D units 23 Single instruction, multiple data (SIMD) instructions Control registers 24 The KeyStone memory 24 Using the internal memory 27 Memory protection and extension 29 Memory throughput 29 Library of Congress Cataloging-in-Publication data applied for ISBN: 9781119003823 Cover design by Wiley Cover image: © matejmo/Gettyimages Set in 10/12pt Warnock by SPi Global, Pondicherry, IndiaĬontents Preface xviii Acknowledgements xxi Foreword xxii About the Companion Websiteġ Introduction 1 Multicore processors 3 Can any algorithm benefit from a multicore processor? 3 How many cores do I need for my application? 5 Key applications of high-performance multicore devices 6 FPGAs, Multicore DSPs, GPUs and Multicore CPUs 8 Challenges faced for programming a multicore processor 9 Texas Instruments DSP roadmap 10 Conclusion 11 References 12Ģ.1 2.2 2.2.1 2.2.1.1 2.2.1.2 2.2.2 2.2.2.1 2.2.3 2.2.3.1 2.2.3.2 2.2.3.3 2.2.3.4 2.2.3.5 2.3 2.3.1 2.4 2.4.1 2.4.2 2.4.3ġ4 Overview 14 The CPU 15 Cross paths 16 Data cross paths 17 Address cross paths 18 Register file A and file B 20 Operands 20 Functional units 21 Condition registers 21. This edition first published 2018 © 2018 John Wiley & Sons Ltd Multicore DSP From Algorithms to Real-time Implementation on the TMS320C66x SoC |